IISc, TalentSprint partner to create VLSI workforce
The six-month programme is designed for industry professionals keen to design future-ready chips with capabilities that can power new age technologies such as AI, IoT, VR, Mobility, Cloud and Analytics.
Hyderabad: The Indian Institute of Science (IISc) and TalentSprint, an NSE Group company, announced their fourth deep tech programme with the launch of the PG Level Advanced Certification Programme in VLSI (very large-scale integration) Chip Design.
The six-month programme is designed for industry professionals keen to design future-ready chips with capabilities that can power new age technologies such as AI, IoT, VR, Mobility, Cloud and Analytics. Delivered through live interactive online classes by faculty from the Department of Electronic Systems Engineering (DESE) at IISc, the programme will enable participants to learn hands-on and practice on industry projects using VLSI tools and boards.
Announcing the programme, Programme director Dr Chetan Singh Thakur said, “Working with TalentSprint, we are launching this programme to prepare professionals for the future of Chip Design. The programme is designed to build strong foundations on advanced digital, analog and emerging technologies combined with mentored practice on industry relevant capstone projects, using best-in-class VLSI tools and boards.”
Dr Santanu Paul, co-founder and CEO, TalentSprint, said, “The PG Level Advanced Certification Programme in VLSI Chip Design is our fourth programme with IISc. We are confident that the exceptional subject matter expertise of DESE, combined with the deep industry networks and connections provided by TalentSprint will be highly coveted by VLSI industry professionals keen to build deeper expertise.”
“Graduates will join TalentSprint’s elite club of 3,000 plus deep tech alumni, thereby continuing to reap life-long benefits through peer learning and networking,” Paul added.
Applications are now open for the first cohort of the PG Level Advanced Certification Programme in VLSI Chip Design, which starts in June 2021.
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